Struct esp_idf_sys::sens_dev_s__bindgen_ty_19__bindgen_ty_1

#[repr(C, align(4))]
pub struct sens_dev_s__bindgen_ty_19__bindgen_ty_1 {
    pub _bitfield_align_1: [u8; 0],
    pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4]>,
}

Fields

_bitfield_align_1: [u8; 0]

_bitfield_1: __BindgenBitfieldUnit<[u8; 4]>

Implementations

impl sens_dev_s__bindgen_ty_19__bindgen_ty_1

pub fn sar2_clk_div(&self) -> u32

pub fn set_sar2_clk_div(&mut self, val: u32)

pub fn sar2_sample_cycle(&self) -> u32

pub fn set_sar2_sample_cycle(&mut self, val: u32)

pub fn sar2_sample_bit(&self) -> u32

pub fn set_sar2_sample_bit(&mut self, val: u32)

pub fn sar2_clk_gated(&self) -> u32

pub fn set_sar2_clk_gated(&mut self, val: u32)

pub fn sar2_sample_num(&self) -> u32

pub fn set_sar2_sample_num(&mut self, val: u32)

pub fn sar2_pwdet_force(&self) -> u32

pub fn set_sar2_pwdet_force(&mut self, val: u32)

pub fn sar2_dig_force(&self) -> u32

pub fn set_sar2_dig_force(&mut self, val: u32)

pub fn sar2_data_inv(&self) -> u32

pub fn set_sar2_data_inv(&mut self, val: u32)

pub fn reserved30(&self) -> u32

pub fn set_reserved30(&mut self, val: u32)

pub fn new_bitfield_1( sar2_clk_div: u32, sar2_sample_cycle: u32, sar2_sample_bit: u32, sar2_clk_gated: u32, sar2_sample_num: u32, sar2_pwdet_force: u32, sar2_dig_force: u32, sar2_data_inv: u32, reserved30: u32, ) -> __BindgenBitfieldUnit<[u8; 4]>

Trait Implementations

impl Clone for sens_dev_s__bindgen_ty_19__bindgen_ty_1

fn clone(&self) -> sens_dev_s__bindgen_ty_19__bindgen_ty_1

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for sens_dev_s__bindgen_ty_19__bindgen_ty_1

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for sens_dev_s__bindgen_ty_19__bindgen_ty_1

fn default() -> sens_dev_s__bindgen_ty_19__bindgen_ty_1

Returns the “default value” for a type.

impl Copy for sens_dev_s__bindgen_ty_19__bindgen_ty_1