Type Alias esp_idf_sys::sens_dev_t
source · pub type sens_dev_t = sens_dev_s;Aliased Type§
struct sens_dev_t {Show 56 fields
pub sar_read_ctrl: sens_dev_s__bindgen_ty_1,
pub sar_read_status1: u32,
pub sar_meas_wait1: sens_dev_s__bindgen_ty_2,
pub sar_meas_wait2: sens_dev_s__bindgen_ty_3,
pub sar_meas_ctrl: sens_dev_s__bindgen_ty_4,
pub sar_read_status2: u32,
pub ulp_cp_sleep_cyc0: u32,
pub ulp_cp_sleep_cyc1: u32,
pub ulp_cp_sleep_cyc2: u32,
pub ulp_cp_sleep_cyc3: u32,
pub ulp_cp_sleep_cyc4: u32,
pub sar_start_force: sens_dev_s__bindgen_ty_5,
pub sar_mem_wr_ctrl: sens_dev_s__bindgen_ty_6,
pub sar_atten1: u32,
pub sar_atten2: u32,
pub sar_slave_addr1: sens_dev_s__bindgen_ty_7,
pub sar_slave_addr2: sens_dev_s__bindgen_ty_8,
pub sar_slave_addr3: sens_dev_s__bindgen_ty_9,
pub sar_slave_addr4: sens_dev_s__bindgen_ty_10,
pub sar_tctrl: sens_dev_s__bindgen_ty_11,
pub sar_i2c_ctrl: sens_dev_s__bindgen_ty_12,
pub sar_meas_start1: sens_dev_s__bindgen_ty_13,
pub sar_touch_ctrl1: sens_dev_s__bindgen_ty_14,
pub touch_thresh: [sens_dev_s__bindgen_ty_15; 5],
pub touch_meas: [sens_dev_s__bindgen_ty_16; 5],
pub sar_touch_ctrl2: sens_dev_s__bindgen_ty_17,
pub reserved_88: u32,
pub sar_touch_enable: sens_dev_s__bindgen_ty_18,
pub sar_read_ctrl2: sens_dev_s__bindgen_ty_19,
pub sar_meas_start2: sens_dev_s__bindgen_ty_20,
pub sar_dac_ctrl1: sens_dev_s__bindgen_ty_21,
pub sar_dac_ctrl2: sens_dev_s__bindgen_ty_22,
pub sar_meas_ctrl2: sens_dev_s__bindgen_ty_23,
pub reserved_a4: u32,
pub reserved_a8: u32,
pub reserved_ac: u32,
pub reserved_b0: u32,
pub reserved_b4: u32,
pub reserved_b8: u32,
pub reserved_bc: u32,
pub reserved_c0: u32,
pub reserved_c4: u32,
pub reserved_c8: u32,
pub reserved_cc: u32,
pub reserved_d0: u32,
pub reserved_d4: u32,
pub reserved_d8: u32,
pub reserved_dc: u32,
pub reserved_e0: u32,
pub reserved_e4: u32,
pub reserved_e8: u32,
pub reserved_ec: u32,
pub reserved_f0: u32,
pub reserved_f4: u32,
pub sar_nouse: u32,
pub sardate: sens_dev_s__bindgen_ty_24,
}Fields§
§sar_read_ctrl: sens_dev_s__bindgen_ty_1§sar_read_status1: u32§sar_meas_wait1: sens_dev_s__bindgen_ty_2§sar_meas_wait2: sens_dev_s__bindgen_ty_3§sar_meas_ctrl: sens_dev_s__bindgen_ty_4§sar_read_status2: u32§ulp_cp_sleep_cyc0: u32§ulp_cp_sleep_cyc1: u32§ulp_cp_sleep_cyc2: u32§ulp_cp_sleep_cyc3: u32§ulp_cp_sleep_cyc4: u32§sar_start_force: sens_dev_s__bindgen_ty_5§sar_mem_wr_ctrl: sens_dev_s__bindgen_ty_6§sar_atten1: u32§sar_atten2: u32§sar_slave_addr1: sens_dev_s__bindgen_ty_7§sar_slave_addr2: sens_dev_s__bindgen_ty_8§sar_slave_addr3: sens_dev_s__bindgen_ty_9§sar_slave_addr4: sens_dev_s__bindgen_ty_10§sar_tctrl: sens_dev_s__bindgen_ty_11§sar_i2c_ctrl: sens_dev_s__bindgen_ty_12§sar_meas_start1: sens_dev_s__bindgen_ty_13§sar_touch_ctrl1: sens_dev_s__bindgen_ty_14§touch_thresh: [sens_dev_s__bindgen_ty_15; 5]§touch_meas: [sens_dev_s__bindgen_ty_16; 5]§sar_touch_ctrl2: sens_dev_s__bindgen_ty_17§reserved_88: u32§sar_touch_enable: sens_dev_s__bindgen_ty_18§sar_read_ctrl2: sens_dev_s__bindgen_ty_19§sar_meas_start2: sens_dev_s__bindgen_ty_20§sar_dac_ctrl1: sens_dev_s__bindgen_ty_21§sar_dac_ctrl2: sens_dev_s__bindgen_ty_22§sar_meas_ctrl2: sens_dev_s__bindgen_ty_23§reserved_a4: u32§reserved_a8: u32§reserved_ac: u32§reserved_b0: u32§reserved_b4: u32§reserved_b8: u32§reserved_bc: u32§reserved_c0: u32§reserved_c4: u32§reserved_c8: u32§reserved_cc: u32§reserved_d0: u32§reserved_d4: u32§reserved_d8: u32§reserved_dc: u32§reserved_e0: u32§reserved_e4: u32§reserved_e8: u32§reserved_ec: u32§reserved_f0: u32§reserved_f4: u32§sar_nouse: u32§sardate: sens_dev_s__bindgen_ty_24