Constant esp_idf_sys::soc_module_clk_t_SOC_MOD_CLK_PLL_D2

pub const soc_module_clk_t_SOC_MOD_CLK_PLL_D2: soc_module_clk_t = 5;

< PLL_D2_CLK is derived from PLL, it has a fixed divider of 2